Sunday, 21 April 2013

Advanced Embedded C Class 1

8051 Memory Configurations:

START END MEMORY CLASS
C:000000H C:00FFFFH CODE
C:000000H C:00FFFFH CONST
I:000000H I:0000FFH IDATA
I:000000H I:00007FH DATA
I:000020H.0 I:00002FH.7 BIT
X:000000H X:00FFFFH XDATA


Code memory starts from zero , but this is reserved for program.It typically executes from C:0000h
to C:FFFFh.The code segment is accessed via program counter(PC).

DATA memory is on chip RAM which starts from D:00 to D:07fh.This RAM can be used for program variables. This is directly addressable.

IDATA memory is also on chip RAM which starts from I:00h to I:FFh. Here IDATA includes DATA memory(00h to 7fh) also which is also indirectly addressable.It is only indirectly addressable and is prefixed by I.

XDATA memory is off chip memory.This exist in external RAM device and X stands XDATA.The DPTR is used to access the XDATA memory.

Memory Models:

There are three memory models SMALL,COMPACT,LARGE

SMALL:
All variables and parameter passing segments are using this model.

COMPACT:

--Site under construction---

Saturday, 20 April 2013

4.8051 Microcontroller III

In the previous topic we have discussed about Addressing Modes & Instruction set.Let us discuss about Timers and Counters.

        In general 8051 is having two timers/counters .Timers are used to generate a delay and counter are used to count the events.Timers are named as timer 0 & timer 1 and both are 16 bit timers.
Both timers can be accessed by different registers as low byte reg & high byte reg,

Low Byte Reg : TL0/TL1,
High byte Reg:  TH0/TH1

Example:
It can be accessed like any other registers
MOV TL0,#05eH
MOV R1,TH0



TMOD is the register which is used to set & select the timer modes.

 TMOD is a 8-bit register
 Lower 4 bits : Timer 0.
 Upper 4 bits: Timer 1.

As you can see in the above chart, four bits (two for each timer) are used to specify a mode of operation. The modes of operation are:

M1M0Timer ModeDescription of Mode
00013-bit Timer.
01116-bit Timer
1028-bit auto-reload
113Split timer mode



13-bit Timer Mode (mode 0):
Timer mode "0" is a 13-bit timer. Generally the 13-bit timer mode is not being used in new.

16-bit Timer Mode (mode 1):
Timer mode "1" is a 16-bit timer. This is a very commonly used mode.

TL0 and TL1 are incremented from 00h to FFh. When it reaches FFh,it resets to 0 and also TH0 or TH1 getting increment by 1.


To generate a time delay
1. Load the TMOD value register indicating
which timer (timer 0 or timer 1) is to be
used and which timer mode (0 or 1) is
selected
2. Load registers TL and TH with initial count
value
3. Start the timer
4. Keep monitoring the timer flag (TF) with
the JNB TFx,target instruction to see
if it is raised
 Get out of the loop when TF becomes high
5. Stop the timer
6. Clear the TF flag for the next round
7. Go back to Step 2 to load TH and TL
again

Example 1:

In the following program, we create a square wave of 50% duty cycle (with
equal portions high and low) on the P1.6 bit. Timer 0 is used to generate the
time delay. Analyze the program
MOV TMOD,#01 ;Timer 0, mode 1(16-bit mode)
HERE: MOV TL0,#02CH ;TL0=F2H, the low byte
MOV TH0,#0FFH ;TH0=FFH, the high byte
CPL P1.6 ;toggle P1.5
ACALL DELAY
SJMP HERE
In the above program notice the following step.
1. TMOD is loaded.
2. FFF2H is loaded into TH0-TL0.
3. P1.5 is toggled for the high and low portions of the pulse.


In Example 2: 
calculate the amount of time delay in the DELAY
subroutine generated by the timer. Assume XTAL = 11.0592 MHz.
Solution:
The timer works with a clock frequency of 1/12 of the XTAL
frequency; therefore, we have 11.0592 MHz / 12 = 921.6 kHz as the
timer frequency. As a result, each clock has a period of T =
1/921.6kHz = 1.085us. In other words, Timer 0 counts up each 1.085
us resulting in delay = number of counts × 1.085us.
The number of counts for the roll over is FFFFH – FFF2H = 0DH (13
decimal). However, we add one to 13 because of the extra clock
needed when it rolls over from FFFF to 0 and raise the TF flag. This
gives 14 × 1.085us = 15.19us for half the pulse. For the entire period it
is T = 2 × 15.19us = 30.38us as the time delay generated by the timer.




To calculate the values to be loaded
into the TL and TH registers, look at
the following example
 Assume XTAL = 11.0592 MHz, we can
use the following steps for finding the TH,
TL registers’ values
1. Divide the desired time delay by 1.085 us
2. Perform 65536 – n, where n is the decimal
value we got in Step1
3. Convert the result of Step2 to hex, where
yyxx is the initial hex value to be loaded into
the timer’s register
4. Set TL = xx and TH = yy

Example 3:

Assume that XTAL = 11.0592 MHz. What value do we need to load
the timer’s register if we want to have a time delay of 5 ms
(milliseconds)? Show the program for timer 0 to create a pulse width
of 5 ms on P2.3.
Solution:
Since XTAL = 11.0592 MHz, the counter counts up every 1.085 us.
This means that out of many 1.085 us intervals we must make a 5 ms
pulse. To get that, we divide one by the other. We need 5 ms / 1.085
us = 4608 clocks. To Achieve that we need to load into TL and TH
the value 65536 – 4608 = EE00H. Therefore, we have TH = EE and
TL = 00.
CLR P2.3 ;Clear P2.3
MOV TMOD,#01 ;Timer 0, 16-bitmode
HERE: MOV TL0,#0 ;TL0=0, the low byte
MOV TH0,#0EEH ;TH0=EE, the high byte
SETB P2.3 ;SET high P2.3
SETB TR0 ;Start timer 0
AGAIN: JNB TF0,AGAIN ;Monitor timer flag 0
CLR TR0 ;Stop the timer 0
CLR TF0 ;Clear timer 0 flag.





8-bit Timer Mode (mode 2):
Timer mode "2" is an 8-bit auto-reload mode. When a timer is in mode 2, THx holds the "reload value" and TLx is the timer itself. Thus, TLx starts counting up. When TLx reaches 255 and is subsequently incremented, instead of resetting to 0 (as in the case of modes 0 and 1), it will be reset to the value stored in THx.

It is an 8-bit timer; therefore, it allows
only values of 00 to FFH to be loaded
into the timer’s register TH
2. After TH is loaded with the 8-bit value,the 8051 gives a copy of it to TL.Then the timer must be started. This is done by the instruction SETB TR0 for timer 0 and SETB TR1 for timer 1
3. After the timer is started, it starts to
count up by incrementing the TL register. It counts up until it reaches its limit of FFH. When it rolls over from FFH to 00, it sets high
the TF (timer flag).


When the TL register rolls from FFH to 0
and TF is set to 1, TL is reloaded
automatically with the original value kept
by the TH register.
1) To repeat the process, we must simply clear
TF and let it go without any need by the
programmer to reload the original value
2)This makes mode 2 an auto-reload, in
contrast with mode 1 in which the
programmer has to reload TH and TL.


To generate a time delay
1. Load the TMOD value register indicating
which timer (timer 0 or timer 1) is to be
used, and the timer mode (mode 2) is
selected
2. Load the TH registers with the initial
count value
3. Start timer
4. Keep monitoring the timer flag (TF) with
the JNB TFx,target instruction to see
whether it is raised
Get out of the loop when TF goes high
5. Clear the TF flag
6. Go back to Step4, since mode 2 is autoreload


Example:

Assume XTAL = 11.0592 MHz, find the frequency of the square
wave generated on pin P1.0 in the following program
MOV TMOD,#20H ;T1/8-bit/auto reload
MOV TH1,#5 ;TH1 = 5
SETB TR1 ;start the timer 1
BACK: JNB TF1,BACK ;till timer rolls over
CPL P1.0 ;P1.0 to hi, lo
CLR TF1 ;clear Timer 1 flag
SJMP BACK ;mode 2 is auto-reload
Solution:
First notice the target address of SJMP. In mode 2 we do not need to
reload TH since it is auto-reload. Now (256 - 05) × 1.085 us =
251 × 1.085 us = 272.33 us is the high portion of the pulse. Since
it is a 50% duty cycle square wave, the period T is twice that; as
a result T = 2 × 272.33 us = 544.67 us and the frequency =
1.83597 kHz.




Split Timer Mode (mode 3):
Timer mode "3" is a split-timer mode. When Timer 0 is placed in mode 3, it essentially becomes two separate 8-bit timers. That is to say, Timer 0 is TL0 and Timer 1 is TH0. Both timers count from 0 to 255 and overflow back to 0. All the bits that are related to Timer 1 will now be tied to TH0.
While Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be put into modes 0, 1 or 2 normally--however, you may not start or stop the real timer 1 since the bits that do that are now linked to TH0. The real timer 1, in this case, will be incremented every machine cycle no matter what.
The only real use I can see of using split timer mode is if you need to have two separate timers and, additionally, a baud rate generator. In such case you can use the real Timer 1 as a baud rate generator and use TH0/TL0 as two separate timers.

Counters:

Timers can also be used as counters
counting events happening outside the
8051
1) When it is used as a counter, it is a pulse
outside of the 8051 that increments the
TH, TL registers
2) TMOD and TH, TL registers are the same
as for the timer discussed previously
3) Programming the timer in the last
section also applies to programming it
as a counter
4) Except the source of the frequency.

The C/T bit in the TMOD registers
decides the source of the clock for the
timer
1) When C/T = 1, the timer is used as a
counter and gets its pulses from outside
the 8051
2) The counter counts up as pulses are fed from
pins 14 and 15, these pins are called T0 (timer
0 input) and T1 (timer 1 input).

Example:

Assuming that clock pulses are fed into pin T1, write a program
for counter 1 in mode 2 to count the pulses and display the state
of the TL1 count on P2, which connects to 8 LEDs.
Solution:
MOV TM0D,#01100000B ;counter 1, mode 2,
;C/T=1 external pulses
MOV TH1,#0 ;clear TH1
SETB P3.5 ;make T1 input
AGAIN: SETB TR1 ;start the counter
BACK: MOV A,TL1 ;get copy of TL
MOV P2,A ;display it on port 2
JNB TF1,Back ;keep doing, if TF = 0
CLR TR1 ;stop the counter 1
CLR TF1 ;make TF=0
SJMP AGAIN ;keep doing it










---->Class End,Please your comments below<-----------








Friday, 19 April 2013

4.8051 Microcontroller - II

This chapter is continuous of previous chapter 8051 Microcontroller - I.In the previous chapter we have discussed about registers & memory blocks about the 8051.


Let us discuss about addressing mode in 8051.

Adderssing modes:


An "addressing mode" refers to how you are addressing a given memory location. In summary, the addressing modes are as follows, with an example of each:


  1. Immediate Addressing  MOV A,#20h
  2. Direct Addressing         MOV A,30h
  3. Indirect Addressing      MOV A,@R0
  4. External Direct             MOVX A, @DPTRCode
  5. Indirect                        MOVC A,@A+DPT
Each of these addressing modes provides important flexibility.



1.Immediate Addressing:


An "addressing   Immediate addressing is so-named because the value to be stored in memory immediately follows the operation code in memory. That is to say, the instruction itself dictates what value will be stored in memory.
For example, the instruction:
MOV A,#20h
MOV A,#0F1h                     Move the immediate 
                                         data byte F1to the A register

MOV DPTR,#0ABCDh         Move the immediate   
                                        data byte ABCDh to the DPTR
                                     
 MOV R3,#1C                   Move the immediate data 
           byte 1C to register R3 

This instruction uses Immediate Addressing because the Accumulator will be loaded with the value that immediately follows; in this case 20 (hexidecimal).
Immediate operands :
The # sign is the designator. These are 8-bits except for DPTR contents (16-bits).Immediate addressing is very fast since the value to be loaded is included in the instruction. However, since the value to be loaded is fixed at compile-time it is not very flexible.
2.Direct Addressing:

Direct addressing is generally fast since, although the value to be loaded isn’t included in the instruction, it is quickly accessible since it is stored in the 8051s Internal RAM. 
It is also much more flexible than Immediate Addressing since the value to be loaded is whatever is found at the given address--which may be variable.

Example:
MOV R0,12h    Copy data from RAM location  12h to register R0   
MOV 8Ch,R7     Copy data from register R7 Timer 0 high byte 
MOV  5Ch, A     Copy data from register A to RAM location 5Ch



3.Indirect Addressing:
Indirect addressing is a very powerful addressing mode which in many cases provides an exceptional level of flexibility
  Indirect addressing appears as follows:
  MOV A,@R0
This instruction causes the 8051 to analyze the value of the R0 register. The 8051 will then load the accumulator with the value from Internal RAM which is found at the address indicated by R0.
Designated as @Ri, where i is 0 or 1, uses the contents of R0 or R1 in the selected Register Bank to specify the address. Other form is @A, using Accumulator contents.
Examples
MOV A,@R0           Copy the contents of the  address in R0 to the A  register
MOV @R1,#35h     Copy the number 35 h to    the address in R1
MOV @R0,80h        Copy the contents of  the port 0 pins to the  address  in R0
MOV add,@R0     Copy the contents of  the  address in R0 to add
MOV @R1, A       Copy the contents of A to the address in R1

4.External Direct:
External memory can also be accessed using a form of indirect addressing which I call External Indirect addressing. This form of addressing is usually only used in relatively small projects that have a very small amount of external RAM.

8051 Instruction Set:

Here is the very very simple summarized table of instruction set.

Mnemonic Description ByteCycle
ADD A,Rn Add register to accumulator 1 1
ADD A,direct Add direct byte to accumulator 2 1
ADD A, @Ri Add indirect RAM to accumulator 1 1
ADD A,#data Add immediate data to accumulator 2 1
ADDC A,Rn Add register to accumulator with carry flag1 1
ADDC A,direct Add direct byte to A with carry flag 2 1
ADDC A, @Ri Add indirect RAM to A with carry flag 1 1
ADDC A, #data Add immediate data to A with carry flag 2 1
SUBB A,Rn Subtract register from A with borrow 1 1
SUBB A,direct Subtract direct byte from A with borrow 2 1
SUBB A,@Ri Subtract indirect RAM from A with borrow 1 1
SUBB A,#data Subtract immediate data from A with borrow 2 1
INC A Increment accumulator 1 1
INC Rn Increment register 1 1
INC direct Increment direct byte 2 1
INC @Ri Increment indirect RAM 1 1
DEC A Decrement accumulator 1 1
DEC Rn Decrement register 1 1
DEC direct Decrement direct byte 2 1
DEC @Ri Decrement indirect RAM 1 1
INC DPTR Increment data pointer 1 2
MUL AB Multiply A and B 1 4
DIV AB Divide A by B 1 4
DA A Decimal adjust accumulator 1 1
ANL A,Rn AND register to accumulator 1 1
ANL A,direct AND direct byte to accumulator 2 1
ANL A,@Ri AND indirect RAM to accumulator 1 1
ANL A,#data AND immediate data to accumulator 2 1
ANL direct,A AND accumulator to direct byte 2 1
ANL direct,#data AND immediate data to direct byte 3 2
ORL A,Rn OR register to accumulator 1 1
ORL A,direct OR direct byte to accumulator 2 1
ORL A,@Ri OR indirect RAM to accumulator 1 1
ORL A,#data OR immediate data to accumulator 2 1
ORL direct,A OR accumulator to direct byte 2 1
ORL direct,#data OR immediate data to direct byte 3 2
XRL A,Rn Exclusive OR register to accumulator 1 1
XRL A,direct Exclusive OR direct byte to accumulator 2 1
XRL A,@Ri Exclusive OR indirect RAM to accumulator 1 1
XRL A,#data Exclusive OR immediate data to accumulator 2 1
XRL direct,A Exclusive OR accumulator to direct byte 2 1
XRL direct,#data Exclusive OR immediate data to direct byte 3 2
CLR A Clear accumulator 1 1
CPL A Complement accumulator 1 1
RL A Rotate accumulator left 1 1
RLC A Rotate accumulator left through carry 1 1
RR A Rotate accumulator right 1 1
RRC A Rotate accumulator right through carry 1 1
SWAP A Swap nibbles within the accumulator 1 1
MOV A,Rn Move register to accumulator 1 1
MOV A,direct Move direct byte to accumulator 2 1
MOV A,@Ri Move indirect RAM to accumulator 1 1
MOV A,#data Move immediate data to accumulator 2 1
MOV Rn,A Move accumulator to register 1 1
MOV Rn,direct Move direct byte to register 2 2
MOV Rn,#data Move immediate data to register 2 1
MOV direct,A Move accumulator to direct byte 2 1
MOV direct,Rn Move register to direct byte 2 2
MOV direct,direct Move direct byte to direct byte 3 2
MOV direct,@Ri Move indirect RAM to direct byte 2 2
MOV direct,#data Move immediate data to direct byte 3 2
MOV @Ri,A Move accumulator to indirect RAM 1 1
MOV @Ri,direct Move direct byte to indirect RAM 2 2
MOV @Ri, #data Move immediate data to indirect RAM 2 1
MOV DPTR, #data16 Load data pointer with a 16-bit constant 3 2
MOVC A,@A + DPTR Move code byte relative to DPTR to acc 1 2
MOVC A,@A + PC Move code byte relative to PC to acc 1 2
MOVX A,@Ri Move external RAM (8-bit addr.) to A 1 2
MOVX A,@DPTR Move external RAM (16-bit addr.) to A 1 2
MOVX @Ri,A Move A to external RAM (8-bit addr.) 1 2
MOVX @DPTR,A Move A to external RAM (16-bit addr.) 1 2
PUSH direct Push direct byte onto stack 2 2
POP direct Pop direct byte from stack 2 2
XCH A,Rn Exchange register with accumulator 1 1
XCH A,direct Exchange direct byte with accumulator 2 1
XCH A,@Ri Exchange indirect RAM with accumulator 1 1
XCHD A,@Ri Exchange low-order nibble indir. RAM with A1 1
CLR C Clear carry flag 1 1
CLR bit Clear direct bit 2 1
SETB C Set carry flag 1 1
SETB bit Set direct bit 2 1
CPL C Complement carry flag 1 1
CPL bit Complement direct bit 2 1
ANL C,bit AND direct bit to carry flag 2 2
ANL C,/bit AND complement of direct bit to carry 2 2
ORL C,bit OR direct bit to carry flag 2 2
ORL C,/bit OR complement of direct bit to carry 2 2
MOV C,bit Move direct bit to carry flag 2 1
MOV bit,C Move carry flag to direct bit 2 2
ACALL addr11 Absolute subroutine call 2 2
LCALL addr16 Long subroutine call 3 2
RET Return from subroutine 1 2
RETI Return from interrupt 1 2
AJMP addr11 Absolute jump 2 2
LJMP addr16 Long iump 3 2
SJMP rel Short jump (relative addr.) 2 2
JMP @A + DPTR Jump indirect relative to the DPTR 1 2
JZ rel Jump if accumulator is zero 2 2
JNZ rel Jump if accumulator is not zero 2 2
JC rel Jump if carry flag is set 2 2
JNC rel Jump if carry flag is not set 2 2
JB bit, rel Jump if direct bit is set 3 2
JNB bit, rel Jump if direct bit is not set 3 2
JBC bit, rel Jump if direct bit is set and clr bit 3 2
CJNE A,direct,rel Compare direct byte to A and jmp ifn't equal3 2
CJNE A,#data,rel Compare immediate to A and jump ifn't equal3 2
CJNE Rn,#data rel Compare immed. to reg. and jump ifn't equal3 2
CJNE @Ri,#data,rel Compare immed. to ind. and jump ifn't equal3 2
DJNZ Rn,rel Decrement register and jump ifn't zero 2 2
DJNZ direct,rel Decrement direct byte and jump ifn't zero 3 2
NOP No operation 1 1

Continue to Next.."Timers and Counters"


Thursday, 18 April 2013

3.8051 Microcontrollers - I

               We have discussed about Microcontroller/Microprocessors in previous chapter.Let us discuss about Generic 8051 microcontroller in detail.Here i am not going to specific type of microcontroller(ex.2k ROM,128 byte RAM such specifications depends on the chip architect,they can choose whatever the specification they want).

3.1 Block Diagram:




As i told earlier 2k ROM,128 byte RAM such specifications depends on the chip architect,they can choose whatever the specification they want.so you dont need to mug up this details.

But in generic 8 bit microcontroller specifications are following:

  • 8-bit CPU optimized for control applications
  • 4K bytes of on-chip Program Memory
  • 128 bytes of on-chip Data RAM
  • Two 16-bit timer/counters
  • Full duplex UART(optional)
  • On-chip clock oscillator(optional,it can run from external oscillator)
  • An eight bit ALU with registers A (the accumulator) and B 
  • A 16 bit program counter(PC) and a 16 bit data  pointer 
  • Eight bit program status word(PSW)
  • Eight bit Stack pointer(SP)
  • An eight bit ALU with registers A (the accumulator) and B 
  • A 16 bit program counter(PC) and a 16 bit data  pointer 
  • Eight bit program status word(PSW)
  • Eight bit Stack pointer(SP)

Internal RAM of 128 bytes.
  •     4 register banks each containing 8 one byte registers
  •     16 bytes that may be addressed at the bit level
  •     the remaining  80 bytes as general   purpose data memory.

The Microcontroller can talk with External Code Memory & External RAM if that feature is enabled on uC.

On-Chip Memory refers to any memory (Code, RAM,SRAM,OTP or other) that physically exists on the microcontroller itself. 

External Code Memory is code (or program) memory that resides off-chip. This is often in the form of an external EPROM. (Ex: SPI flash's from ATMEL & WINDBOND w25x).

External RAM is RAM memory that resides off-chip. This is often in the form of standard static RAM or flash RAM.

Memory:



Special Function Registers:



8 bit Registers:


The 8 bits of a register are shown from
MSB D7 to the LSB D0




With an 8-bit data type, any data larger



The most widely used registers

  •  A (Accumulator)
  •  For all arithmetic and logic instructions
  •  B, R0, R1, R2, R3, R4, R5, R6, R7
  •  DPTR (data pointer), and PC (program counter)



Accumulator - ACC

Address – E0h

Accumulator is used by most of the R8051XC2 instructions to hold the operand and to store
the result of an operation. The mnemonics for accumulator-specific instructions refer to
accumulator as A, not ACC.

B Register - B

Address – F0h

The B register is used during multiplying and division instructions. It can also be used as a
scratch-pad register to hold temporary data.



Program Status Word Register - PSW

Address – D0h





Instructions that affect flag bits




There are 128 bytes of RAM in the
8051
             Assigned addresses 00 to 7FH


The 128 bytes are divided into three
different groups as follows:
1) A total of 32 bytes from locations 00 to 1F hex are set aside for register bank and the stack.

           These 32 bytes are divided into 4 banks of registers in which each bank has 8 registers, R0-R7
RAM location from 0 to 7 are set aside for bank 0 of R0-R7 where R0 is RAM location 0, R1 is RAM location 1, R2 is RAM location 2, and so on, until memory location 7 which belongs to R7 of bank 0.

         It is much easier to refer to these RAM locations with names such as R0, R1, and
so on, than by their memory locations

 A total of 16 bytes from locations 20H to 2FH are set aside for bit-addressable read/write memory
 A total of 80 bytes from locations 30H to 7FH are used for read and write storage,called scratch pad.

Register bank 0 is the default when 8051 is powered up.

2) A total of 16 bytes from locations 20H to 2FH are set aside for bit-addressable
    read/write memory
3) A total of 80 bytes from locations 30H to 7FH are used for read and write storage,
     called scratch pad





We can switch to other banks by use of the PSW register

  •  Bits D4 and D3 of the PSW are used to select the desired register bank
  •  Use the bit-addressable instructions SETB and CLR to access PSW.4 and PSW.3




                 RS1(PSW.4) RS0(PSW.3)
Bank 0                 0            0

Bank 1                 0            1
Bank 2                 1            0
Bank 3                 1            1


Stack Pointer (SP): 

         The stack is a section of RAM used by the CPU to store information temporarily.

 This information could be data or an address

 The register used to access the stack is called the SP (stack pointer) register

 The stack pointer in the 8051 is only 8 bit wide, which means that it can take value
of 00 to FFH

 When the 8051 is powered up, the SP register contains value 07

 RAM location 08 is the first location begin used for the stack by the 8051

PUSH:

The storing of a CPU register in the stack is called a PUSH SP is pointing to the last used location of the stack.As we push data onto the stack, the SP is incremented by one.

This is different from many microprocessors.

Example:

Show the stack and stack pointer from the following. Assume the
default stack area.

MOV R6, #25H
MOV R1, #12H
MOV R4, #0F3H
PUSH 6
PUSH 1
PUSH 4





POP:

Loading the contents of the stack back into a CPU register is called a POP

With every pop, the top byte of the stack is copied to the register specified by the
instruction and the stack pointer is decremented once.

Example:


Examining the stack, show the contents of the register and SP after
execution of the following instructions. All value are in hex.

POP 3 ; POP stack into R3
POP 5 ; POP stack into R5
POP 2 ; POP stack into R2


Continue..





2.Microcontrollers/Microprocessors


         The microprocessor/microcontroller is very very basic of embedded systems.Nowadays all latest advanced equipments having microcontroller/microprocessor.A designer/Architect of chip should know what types of components he needs, ways to reduce production costs and product reliable.

Blocks in microprocessor/controller:

  • CPU: Central Processing Unit
  • I/O: Input /Output
  • Bus: Address bus & Data bus
  • Memory: RAM & ROM
  • Timer
  • Interrupt
  • Serial Port
  • Parallel Port 


Microprocessor:

  • CPU for Computers
  • Does not have RAM, ROM, I/O on CPU chip itself
  • ExampleIntel’s x86, Motorola’s 680x0

A microprocessor  is a general purpose central processing unit of a digital computer

            A very popular general term known as "A chip on a computer".Processors have most of their opcodes moving data from external memory to the CPU.


Microcontroller:


                      A micro controller is a true computer on a chip.A very popular general term known as "A computer on a chip".         The prime use of a microcontroller is to control the operation of a machine using fixed programs that is stored in ROM that doesn't change over the life time of the system.
Example:
Atmel, philips Microcontrollers..

Let us see about "8051 Microcontroller" in detail.




Wednesday, 17 April 2013

1.What is embedded systems?

1.What is embedded systems?


    Embedded systems are a combination of hardware and software. An embedded system has specific requirements and performs pre-defined tasks.

What is hardware?

         Hardware in the sense "a chip" mounted on a board with required interfaces.

What is Software?

       Software is nothing but the programs which is capable to run the hardware towards the designed applications such as Washing machine, ticket vending machines, USB modems...etc...


Here is the questions will come in mind what and all blocks will get included.Let me lists out the blocks in embedded system.

1.Microprocessors/Microcontrollers.(chip)
2.Software codings (Embedded c)
3.PCB Design.