3.8051 Microcontrollers - I

               We have discussed about Microcontroller/Microprocessors in previous chapter.Let us discuss about Generic 8051 microcontroller in detail.Here i am not going to specific type of microcontroller(ex.2k ROM,128 byte RAM such specifications depends on the chip architect,they can choose whatever the specification they want).

3.1 Block Diagram:

As i told earlier 2k ROM,128 byte RAM such specifications depends on the chip architect,they can choose whatever the specification they want.so you dont need to mug up this details.

But in generic 8 bit microcontroller specifications are following:

• 8-bit CPU optimized for control applications
• 4K bytes of on-chip Program Memory
• 128 bytes of on-chip Data RAM
• Two 16-bit timer/counters
• Full duplex UART(optional)
• On-chip clock oscillator(optional,it can run from external oscillator)
• An eight bit ALU with registers A (the accumulator) and B 
• A 16 bit program counter(PC) and a 16 bit data  pointer 
• Eight bit program status word(PSW)
• Eight bit Stack pointer(SP)
• An eight bit ALU with registers A (the accumulator) and B 
• A 16 bit program counter(PC) and a 16 bit data  pointer 
• Eight bit program status word(PSW)
• Eight bit Stack pointer(SP)

Internal RAM of 128 bytes.

•     4 register banks each containing 8 one byte registers
•     16 bytes that may be addressed at the bit level
•     the remaining  80 bytes as general   purpose data memory.

The Microcontroller can talk with External Code Memory & External RAM if that feature is enabled on uC.

On-Chip Memory refers to any memory (Code, RAM,SRAM,OTP or other) that physically exists on the microcontroller itself. 

External Code Memory is code (or program) memory that resides off-chip. This is often in the form of an external EPROM. (Ex: SPI flash's from ATMEL & WINDBOND w25x).

External RAM is RAM memory that resides off-chip. This is often in the form of standard static RAM or flash RAM.

Memory:

Special Function Registers:

8 bit Registers:

The 8 bits of a register are shown from
MSB D7 to the LSB D0

With an 8-bit data type, any data larger



The most widely used registers

•  A (Accumulator)
•  For all arithmetic and logic instructions
•  B, R0, R1, R2, R3, R4, R5, R6, R7
•  DPTR (data pointer), and PC (program counter)

Accumulator - ACC

Address – E0h

Accumulator is used by most of the R8051XC2 instructions to hold the operand and to store
the result of an operation. The mnemonics for accumulator-specific instructions refer to
accumulator as A, not ACC.

B Register - B

Address – F0h

The B register is used during multiplying and division instructions. It can also be used as a
scratch-pad register to hold temporary data.

Program Status Word Register - PSW

Address – D0h

Instructions that affect flag bits

There are 128 bytes of RAM in the
8051
             Assigned addresses 00 to 7FH


The 128 bytes are divided into three
different groups as follows:

1) A total of 32 bytes from locations 00 to 1F hex are set aside for register bank and the stack.

           These 32 bytes are divided into 4 banks of registers in which each bank has 8 registers, R0-R7

RAM location from 0 to 7 are set aside for bank 0 of R0-R7 where R0 is RAM location 0, R1 is RAM location 1, R2 is RAM location 2, and so on, until memory location 7 which belongs to R7 of bank 0.

         It is much easier to refer to these RAM locations with names such as R0, R1, and

so on, than by their memory locations

 A total of 16 bytes from locations 20H to 2FH are set aside for bit-addressable read/write memory
 A total of 80 bytes from locations 30H to 7FH are used for read and write storage,called scratch pad.

Register bank 0 is the default when 8051 is powered up.

2) A total of 16 bytes from locations 20H to 2FH are set aside for bit-addressable

    read/write memory

3) A total of 80 bytes from locations 30H to 7FH are used for read and write storage,

     called scratch pad

We can switch to other banks by use of the PSW register

•  Bits D4 and D3 of the PSW are used to select the desired register bank
•  Use the bit-addressable instructions SETB and CLR to access PSW.4 and PSW.3

                 RS1(PSW.4) RS0(PSW.3)
Bank 0                 0            0

Bank 1                 0            1
Bank 2                 1            0
Bank 3                 1            1

Stack Pointer (SP): 

         The stack is a section of RAM used by the CPU to store information temporarily.

 This information could be data or an address

 The register used to access the stack is called the SP (stack pointer) register

 The stack pointer in the 8051 is only 8 bit wide, which means that it can take value
of 00 to FFH

 When the 8051 is powered up, the SP register contains value 07

 RAM location 08 is the first location begin used for the stack by the 8051

PUSH:

The storing of a CPU register in the stack is called a PUSH SP is pointing to the last used location of the stack.As we push data onto the stack, the SP is incremented by one.

This is different from many microprocessors.

Example:

Show the stack and stack pointer from the following. Assume the
default stack area.

MOV R6, #25H
MOV R1, #12H
MOV R4, #0F3H
PUSH 6
PUSH 1
PUSH 4

POP:

Loading the contents of the stack back into a CPU register is called a POP

With every pop, the top byte of the stack is copied to the register specified by the
instruction and the stack pointer is decremented once.

Example:


Examining the stack, show the contents of the register and SP after
execution of the following instructions. All value are in hex.

POP 3 ; POP stack into R3
POP 5 ; POP stack into R5
POP 2 ; POP stack into R2

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